The computer’s CPU fetches, decodes, and executes program instructions and consists of a number of registers, some of which are general purpose and some of which are special purpose. Registers store data or instructions temporarily
Arithmetic Logic Unit
The CPU contains an Arithmetic logic unit (ALU for short) and this performs arithmatic and logic operations. The inputs to the ALU are the data to be operated on (called operands) and a code from the control unit indicating which operation to perform. Its output is the result of the computation.
The Program Counter holds the address of the next instruction to be loaded, this is called an ‘instruction pointer’ (IP) in Intel documentation. This will normally be incremented during each cycle, i.e. it will point to the next instruction in memory, However, an instruction can tell the program counter to point to a different instruction next. E.g. if the current instruction is in memory location 2123, then ‘Goto 2565’ will tell the program counter to point to 2565 next and not 2124. Hence, once the GOTO 2565 is executed, the current contents of the Program Counter are over written by 2565.
Memory Address Register
The MAR holds the address of data/instructions to be read or written, this register is linked to the address bus. Before the CPU can execute an instruction, the address (in memory) of that instruction must be transferred to the MAR.Before the CPU can write anything TO memory, the address of the location to which that data must be written has to be copied to the MAR. This register then sends the address down the address bus to memory. Memory then returns/stores the data/instructions
Memory Buffer Register
The MBR holds data just read or about to be written, it is linked to the data bus. Whenever data or instructions are returned from memory, they are transferred to this register. This register then passes these onto whichever part of the CPU they need to be sent to
Current Instruction Register
The CIR holds the instruction that is currently being worked on, it is also simply referred to as the instruction register (IR). The instruction takes two parts – ‘what to do’ (opcode) and ‘what to do with it’ (operand)
The CPU has to share data and transfer data to other parts of the computer at some point, it does this via the use of a Data Bus. Busses consist of Data lines, control lines and address lines. While the data lines convey bits from one device to another, control lines determine the direction of data flow, and when each device can access the bus. Address lines determine the location of the source or destination of the data.
Every computer contains at least one clock that synchronizes the activities of its components. The clock frequency, measured in megahertz or gigahertz, determines the speed with which all operations are carried out.
A computer communicates with the outside world through its input/output (I/O) subsystem. I/O devices connect to the CPU through various interfaces.
The normal execution of a program is altered when an event of higher-priority occurs. The CPU is alerted to such an event through an interrupt. Interrupts can be triggered by I/O requests, arithmetic errors (such as division by zero), or when an invalid instruction is encountered. Each interrupt is associated with a procedure that directs the actions of the CPU when an interrupt occurs.
ASM (Assembler) is the lowest form of human-readable instructions for a processor to carry out. ASM is converted into Opcodes by the computer before arriving at the cpu for processing in the fetch-execute life-cycle. Instructions have three parameters: function, reference one, reference two. The only required parameter is the function as some do not require additional parameters.
// Moves the contents of 4C00H // into the register known as AX MOV AX, 4C00H
Instructions come in the following format: | Opcode | Address 1 | Address 2 |.
The opcode is the part which asks, "What shall i do with the 2 addresses?" for example, you may wish to Add the 2 addresses together or multiply them, this is what the opcode is and is stored in the first section of the instruction format. This opcode is deciphered and then compared against a library of instructions held in the Control Unit.
The Address part points to the part of the memory in which the data relating to the instruction is being held.
An example instruction is as follows: | Add | FA578912 | FF818122|
Memory locations are stored in sequential order and can hold data or instructions. CBA TO CARRY ON.